CLOCK REGENERATION CIRCUIT

专利名称：CLOCK REGENERATION CIRCUIT发明人：TADA, Shunichi,SHIRAISHI, Kenichi申请号：EP98924555.0申请日：19980610公开号：EP0989706A1公开日：20000329

专利附图：

摘要：A clock regeneration circuit for regenerating a clock signal for demodulatingdata from an AM data multiplex modulated signal where digitally modulated signals aremultiplexed in the same frequency band as those of an amplitude-modulated signal atthe same time. The carrier for an amplitude-modulated signal is extracted from an AM

data multiplex modulated signal where digitally modulated signals are multiplexed in thesame frequency band as those of the amplitude-modulated signal at the same timethrough a band-pass filter (1), and the oscillation frequency of a voltage-controlledoscillator (5) is controlled by the output of a phase comparator (3) through a loop filter(4). The oscillation output of the voltage-controlled oscillator (5) is supplied to a directdigital synthesizer (6) and the phase of the carrier extracted through the band-pass filter(1) is compared with the phase of the output of the direct digital synthesizer (6) by meansof the phase comparator (3). The oscillation output of the voltage-controlled oscillator(5) is then synchronized with the carrier for the amplitude-modulated signal to produce aclock signal for demodulating data.

申请人：KABUSHIKI KAISHA KENWOOD

地址：14-6 Dougenzaka 1-chome Shibuya-ku, Tokyo 150-0043 JP

国籍：JP

代理机构：Patentanwälte Leinweber & Zimmermann

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