Memory initialization system selectively outputtin

专利名称：Memory initialization system selectively

outputting a data between a normal datastored in the memory and a fixed valueaccording to a registered access state

发明人：Naomi Yamazaki申请号：US08/991339申请日：19971216公开号：US06029210A公开日：20000222

摘要：When normal data is written to a desired address in a DRAM, a guarantee bitcomparing/generating circuit sets the value of guarantee bit data stored at the addresscorresponding to the desired address in a DRAM as a value indicating that the normaldata has been written. Since the guarantee bit data stored at each address in the DRAMalways becomes \"000\" or \"111\" immediately after power is turned on, the abovedescribed value indicating that the normal data has been written is set as a value otherthan \"000\" and \"111\". Thereafter, if the value of the guarantee bit data stored at theaddress corresponding to the desired address in the DRAM indicates that the normaldata has been written when the normal data is read from the desired address in theDRAM, the normal data read from the DRAM is output to a data bus. Otherwise, the fixedvalue \"0\" is output to the data bus as read data.

申请人：FUJITSU LIMITED

代理机构：Staas & Halsey LLP

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