MEMORY ACCESS MODES FOR VIDEO DISPLAY GENERATOR

专利名称：MEMORY ACCESS MODES FOR VIDEO

DISPLAY GENERATOR

发明人：KEVIN P. STAGGS,CHARLES J. CLARKE申请号：AU5374286申请日：19860219公开号：AU5374286A公开日：19861016

摘要：A display memory which stores information to be displayed on a raster scanCRT comprises a first storage element for storing dot information, a second storageelement for storing behavior information, and a third storage element for storingcharacteristic information. The first, second, and third storage element are each arrangedin an nxm plane where m is an addressable location and each addressable location withineach plane has n bits of information. Further, each of the first, second, and third storageelements has address terminals each operatively connected to a display address busadapted to receive address information from a CPU. Control logic receives addresssignals, data signals, and control signals from the CPU. The control logic generatesenable control signals to selectively enable access to predetermined combinations ofsaid first, second, and third storage elements in response to the address, data, andcontrol signals from the CPU.

申请人：HONEYWELL INC.

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